Polishing slurry used for copper chemical mechanical polishing (CMP) process

ABSTRACT

A polishing slurry for the chemical-mechanical polishing (CMP) process used in the integrated circuit manufacture process is disclosed. The slurry of the present invention may comprise colloid silica (SiO2) as abrasive particles, and a corrosion inhibitor (e.g., benzotriazole (BTA)). The slurry does not require any oxidizing agent. The slurry may be used as a barrier slurry in copper CMP processes; and it has a similar polishing rate for copper, barrier, and dielectric materials on patterned wafers. The slurry of the present invention also reduces CMP defectivity on polished wafers.

FIELD OF THE INVENTION

[0001] The present invention relates in general to the field ofchemical-mechanical polishing (CMP) processes used in the semiconductorintegrated circuit manufacturing, and more particularly, to compositionsand methods of slurries used in, e.g., copper CMP.

BACKGROUND OF THE INVENTION

[0002] Without limiting the scope of the invention, its background isdescribed in connection with chemical-mechanical polishing and polishingslurry, as an example.

[0003] Developments in semiconductor technology have led to thefabrication of integrated circuit (IC) wafers with circuits havingmultiple levels of interconnections. In order to reduce RC delay causedby interconnect, a variety of new materials have been introduced intothe IC manufacturing process. For example, copper is used to replacealuminum due to its lower resistance and better electromigrationresistance. Low dielectric constant materials (low k), such asfluorosilicate glass (FSG), hydrogen silsesquioxane (HSQ),organosilicate glass (OSG), Black Diamond™, SiLK™ are used to reduce thecapacitance coupling among wires. Due to the difficulty of etchingcopper in a plasma etch chamber, a damascene process is typically usedto create copper wiring.

[0004] In the damascene process, openings in a dielectric layer areformed through patterning and etching process. In a single damascenestructure, the openings are trench or via, and in a dual damascenestructure, the openings are trench and via together. The openings arethen coated with a barrier layer, such as Ta or TaN, to prevent copperdiffusion and to improve adhesion, followed by formation of the copperseed layer. The openings are then filled with copper through, e.g., anelectroplating process. The chemical mechanical polishing (CMP) processis used to remove excess portions of copper and to planarize thesurface.

[0005] In a CMP process, material removal is achieved through theinteraction between polishing pad, polishing slurry and wafer. Thepolishing slurry is a critical part of the polishing system. To a largeextent, it determines the polishing performance. A copper CMP process istypically a multi-step process. In the first step, a slurry with a highpolishing rate for copper and low polishing rate for the barrier is usedto remove a majority or all of the redundant copper from the wafersurface. The high selectivity of copper removal rate to barrier removalrate is designed so the polish stops at the barrier layer. Hence, thenon-uniformity from electro-chemical plating will not be transferredinto the final copper thickness variation. In the second step of the CMPprocess, the barrier layer is removed to completely cut off un-designedconnections among wires in the layer. The slurry used in the barrierremoval step is called barrier slurry and is typically different fromthat used in the first step.

[0006] There are currently two types of barrier slurry, thehigh-selectivity slurry (HSS) and the low-selectivity slurry (LSS). TheHSS slurry has a higher removal rate for the barrier than that for thecopper and dielectric layer. The LSS slurry polishes copper, dielectricmaterial, and barrier layer at similar rate. Sometimes, a third step,called the buff step is used to improve defectivity.

[0007] Typically, copper CMP barrier slurries contain abrasive material(such as silica or alumina), a corrosion inhibitor (such asbenzotriazole (BTA)), an oxidizer (such as hydrogen peroxide, potassiumiodate), and one or more of a long list of additives includingsurfactant, stabilizer, complexing agent, biocides, et al. The variouschemicals and abrasive particles are used to balance the polishing andpassivation reactions at the wafer/pad interface to achieve desiredselectivity and lower defectivity.

SUMMARY OF THE INVENTION

[0008] It has been found, however, that present barrier slurry used incopper CMP process has disadvantages. One problem encountered withcurrent slurries used in the industry is polishing induced defects.Scratching from the CMP process is a major source of defects, and copperis more susceptible to CMP scratches due to its materialcharacteristics. Because of its susceptibility to sheering, most barrierslurry with fuimed silica is difficult to handle (pump and filter) in amanufacturing environment. Large undesirable particles (agglomerate) areconsidered to be the major sources of defectivity.

[0009] Another problem encountered with current barrier slurry is theselectivity. For low selectivity slurry (LSS), it is desirable that thepolishing rate for copper, barrier and dielectric material is similar.In order to achieve such polish rate parity, it is a current commonpractice to add an oxidizing agent to the slurry to increase the copperremoval rate. In order to maintain the polishing rate for copper and toreduce the decay of oxidizer, some stabilizing agent is typically alsoadded to the slurry.

[0010] However, it has been recognized in the current invention that theaddition of oxidizer, even in the presence of stabilizer, can causepolish rate instability and limited slurry pot life. It has also beenrecognized that the oxidizer will chemically attack copper, causingundesirable copper corrosion. It has further been recognized that thepolish rate parity among copper, barrier, and dielectrics achieved onpilot wafers may not be realized on patterned wafers.

[0011] Therefore, what is needed in copper CMP is a barrier slurry thatprovides lower defectivity and desired selectivity for the patternedwafers. In one embodiment of the present invention, the fumed silicaabrasive material is replaced with colloid silica in the barrier slurry.In another embodiment of the present invention, the oxidizer is removedfrom barrier slurry and the desired selectivity on patterned wafers isachieved through the control of mix ratio between the abrasive particle(colloid silica) and corrosion inhibitor (BTA).

[0012] One advantage of an embodiment of the polishing slurry of thecurrent invention is the lower defectivity. The use of colloid silicaallows more aggressive filtration at the slurry re-circulation loop andpoint of use (POU). A second advantage of the slurry of to the presentinvention is a reduction in the undesirable attack of copper by thebarrier slurry. Two more advantages of the present invention are theability to achieve desired selectivity on the patterned wafers and thesignificant improvement of pot life. Yet another advantage of thepresent invention is a reduction of cost associated with manufacture anddelivery of the barrier slurry.

[0013] More specifically, the present invention provides a polishingslurry comprising a dispersing medium, a colloidal silicon suspended inthe dispersing medium, and a corrosion inhibitor in the polishing slurrymedium.

[0014] The present invention also provides a method of polishing adamascene structure using a chemical-mechanical polishing (CMP)apparatus. A damascene structure is provided, as well as a polishingpad. A polishing slurry is applied to the interface between thedamascene structure and the polishing pad. Polishing is then performedusing polishing parameters of the CMP apparatus, removing at least aportion of the metal layer.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] For a more complete understanding of the features and advantagesof the present invention, reference is now made to the detaileddescription of the invention along with the accompanying figures inwhich corresponding numerals in the different figures refer tocorresponding parts and in which:

[0016]FIG. 1 is a diagram illustrative of a cross-section of a damascenestructure before a copper CMP process;

[0017]FIG. 2 is diagram illustrative of a cross-section of a damascenestructure after first step of copper CMP, polish stops on barrier;

[0018]FIG. 3 is diagram illustrative of a cross-section of a damascenestructure after barrier removal; and

[0019]FIG. 4 is a graph that shows the removal rate and its dependenceon varying concentrations of the compositions according to the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

[0020] While the making and using of various embodiments of the presentinvention are discussed in detail below, it should be appreciated thatthe present invention provides many applicable inventive concepts thatmay be embodied in a wide variety of specific contexts. The specificembodiments discussed herein are merely illustrative of specific ways tomake and use the invention and do not delimit the scope of theinvention.

[0021] For the sake of simplicity, in FIG. 1, a single damascene trenchstructure is illustrated. The situation for single damascene of via, ordual damascene, where trench and via are formed together is similar.FIG. 1 is a cross sectional view of a wafer 10 depicting a conventionalsingle damascene structure for trench. The damascene structure was builton the top of the inter-level dielectric layer (ILD) 11. The intra-metaldielectric layer (IMD) 14 is depicted on the top of the ILD layer 11.Patterning and etching are performed to create trench 16. A barrierlayer 18 is deposited, as a way to improve the adhesion between themetal layer 12 and the dielectric layer 14. The barrier layer 18 alsoacts as a diffusion barrier is for the metal layer 12. The wafer 10 iscoated with a thin conductive layer of copper, called a seed layer, andimmersed in a solution containing cupric ions for electroplating. Theplated metal layer 12 covers the entire wafer surface 10, and fills thetrench 16.

[0022] A CMP process is then used to remove the excess portions ofcopper and planarize the surface. A copper CMP process is typically amulti-step process. In the first step, a slurry of high selectivity ofcopper to barrier is used to removal majority or all redundant copperfrom the wafer surface. The high selectivity of copper removal rate tobarrier removal rate is designed so the polish can stop at the barrierlayer. Hence, the non-uniformity form electro-chemical deposition willnot be transferred into the final copper thickness variation.

[0023]FIG. 2 is a cross-sectional view of a damascene structure afterthe first step of a typical copper CMP process. Typically, after theremoval of the excess copper of copper layer 12, some of the copperlayer disposed inside the trench is also removed due to bending of thepolishing pad. The undesirable thinning of the copper inside trench,known as “dishing” is shown as dishing 20. In the second step of the CMPprocess the barrier layer is removed to completely cut off un-designedor unintended connections among wires in the layer. The slurry used inthe barrier removal step is called a barrier slurry, which is typicallydifferent from that used in the first step. There are currently twotypes of barrier slurry, the high-selectivity slurry (HSS), and thelow-selectivity slurry (LSS). The HSS slurry has a higher removal ratefor the barrier than that for the copper and dielectric layer. The LSSslurry polishes copper, dielectric material and barrier layer at similarrate. The low selectivity slurry polishes off some copper residue leftfrom previous step, providing a relatively wider process margin. It alsoplanarizes the surface, reducing the dishing at the cost of dielectricmaterial removal.

[0024]FIG. 3 is diagram illustrative of a cross-section of a damascenestructure after the barrier removal with LSS approach. The thinning ofdielectric layer 14 and reduction of dishing 20 are illustrated. Theslurry used for barrier polish in the copper CMP process needs toprovide lower defectivity and designed selectivity on the patternedwafers. The present invention provides such a low defectivity slurry. Inthe current invention, a colloidal silica is used to provide abrasiveparticles, in place of fumed silica typically used in the slurry. Theuse of colloid silica enables the aggressive filtration at the slurryre-circulation loop and point-of-use (POU) with less risk of shearing.

[0025] In the prior art, an oxidizer is typically added to the barrierslurry to increase the polishing rate for copper, and to achieve desiredselectivity. One problem with the prior art is that oxidizer will decayover time, causing a reduction of the copper polish rate over time. Thiswill impose a limited pot life on the mixed slurry. Another problem withthe prior art is that oxidizer attacks the copper thereby causesundesirable copper corrosion. The third problem with the prior art isthat the test for slurry polishing rate was typically performed on pilotwafers (blank wafers without any pattern).

[0026] The present invention recognizes that the removal rate on pilotwafers is not necessary equal to that on the patterned wafers. It ispossible for a barrier slurry to achieve desired selectivity onpatterned wafers without the addition of oxidizer.

[0027] In one embodiment of the present invention, a barrier slurry isachieved through on-platen mix of abrasive component of colloid silicaslurry (e.g., Rodel CUS1201A, 30% solids) and BTA component (e.g., 330ppm by weight) with different mix ratio. The mix ratio is, in oneexemplary case, of 150 ml/min of abrasive component, and 50 ml/min ofBTA component, in another exemplary case, of 100 ml/min of abrasivecomponent, and 100 ml/min of BTA component, and in a third exemplarycase, of 50 ml/min of abrasive component, and 150 ml/min of BTAcomponent. The rate on pilot wafer is obtained by measuring thethickness difference before and after polish. The method to obtain thepolish rate on patterned wafers is illustrated in FIG. 4.

[0028] To obtain the polish rate on patterned wafers, a series ofpatterned wafers may be polished by the primary slurry (e.g., CabotMicroelectronics iCue™ 5001), and stopped by the optical end pointsignal, which indicates that the copper is cleared. The wafers may thenbe polished with the designed barrier slurry with different polish times(e.g., 0.25 min (15 sec), 0.5 min (30 sec), 0.75 min (45 sec), and 1 min(60 sec)). The resulting thickness is measured and plotted against thepolish time, as illustrated for exemplary process in FIG. 4. In FIG. 4,the horizontal axis is the polishing time in the unit of minute, and thevertical axis is the post thickness in the unit of angstrom. The slopeof the plot represents the removal rate on a patterned wafer, in theunit of angstroms/minute.

[0029] In another embodiment of the present invention, a barrier slurryis pre mixed from abrasive component of colloid silica slurry (e.g.,Rodel CUS1201A, 30% solids) and BTA component. The pre mixed slurry has,for example, 15% of solids, but different BTA concentration (e.g., 200ppm, 800 ppm, and 1000 ppm, all by weight).

[0030] While this invention has been described in reference toillustrative embodiments, this description is not intended to beconstrued in a limiting sense. Various modifications and combinations ofthe illustrative embodiments, as well as other embodiments of theinvention, will be apparent to persons skilled in the art upon referenceto the description. It is therefore intended that the appended claimsencompass any such modifications or embodiments.

What is claimed is:
 1. A polishing slurry comprising: a dispersingmedium; a colloidal silicon suspended in the dispersing medium; and acorrosion inhibitor in the dispersing medium.
 2. The polishing slurry ofclaim 1 wherein the slurry does not contain an oxidizing agent.
 3. Thepolishing slurry of claim 1 wherein the ratio of colloidal silica tocorrosion inhibitor is adjustable to a desired selectivity.
 4. Thepolishing slurry of claim 1 wherein slurry is a pre-blended or on-platenpoint-of-use mix.
 5. The polishing slurry of claim 1 wherein surfactantis added to the slurry.
 6. The polishing slurry of claim 1 wherein theslurry may be aged before polish.
 7. The polishing slurry of claim 1wherein the corrosion inhibitor comprises benzotriazole.
 8. Thepolishing slurry of claim 1, comprising about 0.005 to 0.2% by weight ofBTA and about 1 to 30% by weight of SiO2.
 9. A method of polishing adamascene structure using a chemical-mechanical polishing apparatus,comprising the steps of: providing a damascene structure; providing apolishing pad; applying a polishing slurry to the interface between thedamascene structure and the polishing pad; and performing polishingusing polishing parameters of the CMP apparatus, wherein at least aportion of the metal layer is removed.
 10. The method of claim 9,wherein the slurry comprises colloidal silicon and corrosion inhibitors.11. The method of claim 9 wherein the slurry does not contain anoxidizing agent.
 12. The method of claim 9 wherein the ratio ofcolloidal silica to corrosion inhibitor in the slurry is adjustable to adesired selectivity.
 13. The method of claim 9 wherein the slurry can bepre-blended or on-platen point-of-use mixed.
 14. The method of claim 9wherein surfactant is added to the slurry.
 15. The method of claim 9wherein the slurry may be aged before polish.
 16. The method of claim 9wherein the corrosion inhibitor comprises benzotriazole.
 17. The methodof claim 9, wherein the slurry contains about 0.005 to 0.2% by weight ofBTA and about 1 to 30% by weight of SiO2.